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Re: [f-cpu] F-CPU vs. Itanium



> > university did it but they have working 3 ported 32x31 register set
> > operating at 16GHz with only 20W of thermal loss. They use differential
> > signal lines as pairs with low (200mV) swing. They planned to test 200GHz
> > gate ... Only big problem is that they require pair of wires of the
> > same length for each signal.
> I am guessing on this but would not the fact the lines are differntial
> make error detection more likely in a high speed computer and have
> things slow down while any noise happens or at least give a error?

AFAIK the differential signal is more immune to a noise because error
signal is induced to both lines equaly and difference potential still
holds. Especially in BJT design where some current flows thru these wires.
Intel Rambus with Yellowstone technology uses 300mV swing and doesn't seem
to have problems even with MOS inputs (but they have terminators AFAIK).
devik

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