Re: [f-cpu] F-CPU SoC

[Cedric BAIL <cedric.bail@xxxxxxx>]

On Wed, Apr 1, 2015 at 2:31 PM, Nicolas Boulay <nicolas@xxxxxxxxxxx> wrote:
> 2015-04-01 13:30 GMT+02:00 Kim Enkovaara <embo@xxxxxxxx>:
>> On Wed, 1 Apr 2015, whygee@xxxxxxxxx wrote:
>> The bus structure for that is critical and that is not simple thing to
>> solve. Many companies have poured a lot of money into this. Single core is
>> not interecting anymore even for very low end.
>
> Multi core are often under used after 4 cores maximum. It's easy to put 4 or
> 8 core, when you have done the job for 2. But, it's very hard for a programm
> to correctly use it. Good isa could avoid to use complexe technique to have
> out of order cost for performance.

I totally agree on the difficulty of using 4 identical cores
efficiently. The 2D toolkit I work on, can basically use all the
available memory bandwidth with just one core (most optimization are
around reducing memory bandwidth needs to get better performance).
Their is only one operation than can use 2 cores efficiently (scaling
image up and down with interpolation). Usually you average desktop
application will have one core dedicated on the application logic/main
loop (usually IO bound on the user input), another thread doing the
rendering bound on memory bandwidth and some time two thread bound on
the CPU bandwidth. From time to time, it will use thread to do very
long IO operation that would make the main loop unresponsive to user
input. That's for a desktop typical application. Modern browser are
moving to using also a massive number of thread and process as their
rendering pipeline is a little more complex and CPU bound.

Overall the big.little architecture from ARM make a lot of sense in
that kind of scenario... except there is no kernel able to take
benefit of it right now ! Their is ongoing work on the power scheduler
in Linux that should efficiently address the issue, but for now the
benefit are more a theory than a proved thing.

> In the futur, the way to go, i think is buldozer like technologies, it's
> like intel multithreading but with more ALU. You could imagine a see of
> operators, how many register bank than there is cores, and one big memory
> controller.

I would guess that it would have a better usage of all the unit of the
core, but I guess you have to change the frequency for the whole core
and not only one of the CPU "thread". Wouldn't that impact power
consumption ?
-- 
Cedric BAIL
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