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Re: [f-cpu] Interim solution to prototype the core



You will loose time and energy with this board. Synthetizer knows how to use blocks.

Optimization came last.


2015-04-10 14:25 GMT+02:00 <whygee@xxxxxxxxx>:
Le 2015-04-10 14:17, Nicolas Boulay a ÃcritÂ:
Start with the hdl code, not with the prototype.

Ideally, yes.

In practice... Why would I bother with a prototype if I could avoid it ?

Each FPGA family has their own features, properties, advantages
and drawbacks. Their architectures affect the implementations
and their balances in many many ways.

The VHDL will be portable but it should also exploit the platform well
so some pieces will have platform-dependent versions (like RAM blocks,
multipliers, adders...). Otherwise, I can already hear the old
refrain "oh, it's so slow, why use it ?"

Furthermore, FC0 was designed completely in the void and never
went anywhere. With an actual platform, it goes faster.

So I'm starting to spare a bit for this kit...

yg
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