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Re: [f-cpu] snapshot QDCPOC+YGASM



> Since the little endianness was chosen, i think that it conditionned
> the current non-natural bit ordering. It forces the opcode byte to be
> located at byte[0] so it comes first in the instruction flow.
> 
> >  That is, if an instruction is stored at address (A), the
> > MSByte (which is probably the opcode) is stored at (A+3), and the
> > immediately following instruction starts at (A+4).
> people are/were not used to having the opcode at the last position,
> hence the bit-reversing. if we re-reverse the bits, we have to
> change the endianness too, which is not a huge problem in itself,
> after all.

Hi guys,

endianess always is a big issue! That's my experience from
some work in big companies :-) 

But to come back to topic, it's always necessary to talk
about the place too! Endianess can be viewed at the memory
interface, at the decoder input or on the internal busses.
Please do not intermix these!!!

Enidaness (for the software guy) is only interesting when
accessing a register and when the data is loaded/stored
in memory. So please watch the memory <> register interface
and the memory <> instr. decoder interface. If you decide
to make to change in endianess somewhere please watch for
'sideeffects'. I know you know that too... ;-)

JG

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