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Re: [f-cpu] Re: Floating-Point?



hello,

Juergen Goeritz wrote:
> On Thu, 16 Aug 2001, Glenn Alexander wrote:
> > BTW: I am wondering about the reasons for having endian-ness encoded in the
> > instruction. How often do you need to change endinianness. I am thinking a SR
> > for endinian would free up that bit as well as allowing other endiniannesses
> > as well as big and little (Not in popular usage at present but I can think of
> > several other bizaar ways to re-arrange the bits in a word that may be useful
> > in some obscure application).
> 
> Hi,
> 
> enidaness things may cost a lot in some implementations. Think
> of some network protocols having fixed byte order that are not
> compliant with the architecture. Network needs fast responding
> time though. I had that problem once and thanks to the RISC
> processor it was possible to access different endianess memory
> banks that could be overlapped... ;-)

For those who where not yet here when the question was raised first :
there is already a patent (MIPS) on a configuration register
that defines endianness. So we thought : fuck, let's simply move
the bit to the instruction. In fact, it's exactly the same amount
of HW (a "swap" unit that works both ways) but it is not configured
at boot time. that's all. I think that VAX byte ordering was never
considered. For this and the rest, there must be all the necessary
instructions provided by the SHL (bit shuffling) unit.

> JG
WHYGEE
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