Re: [f-cpu] More Instruction Set Trouble

[nicO <nicolas.boulay@ifrance.com>]

Michael Riepe a écrit :
> 
> On Tue, Aug 21, 2001 at 12:33:15AM -0400, nicO wrote:
> [...]
> > > The `address add' idea looks better and better, and it's good for
> > > pointer/array/structure accesses, too.
> > >
> >
> > Hum i don't like that at all because you schould put an adder just
> > before the memory unit. So we just as to make the pipeline longer. One
> > of the key point of the FC0, to shorten the pipeline, is to put in
> > parrallele the ALU and the load&store unit. If we put it in serial, we
> > longer the pipe. So i think, it's much better for that case to use 2
> > instructions. Never forget that it's adding an other addressing mode .
> 
> I think we have a slight misunderstanding here -- `address add' *is*
> a separate instruction.  Like normal full-width add, but with slightly
> different semantics (like code/data prefetching).
> 

You mean that prefetching could be done 'later' in a no synchronous way
(in the sense of none blocking way), to avoid to increase the umber of
pipe stage ?

Does this instruction still use the common ALU or does it add something
else ?

nicO

> --
>  Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
>  "All I wanna do is have a little fun before I die"
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