RE: [f-cpu] Re: Floating-Point

[Hans Summers <Hans.Summers@tudor.com>]

> hi,
> 
> nicO wrote:
> > Michael Riepe a écrit :
> > > On Sun, Aug 19, 2001 at 05:33:05PM -0400, nicO wrote:
> > > > Hello,
> > > > I'm looking for the "usual" definition of the port of a unit :
> > > > 3 data in,
> > > Or less.
> > Yep!
> > > > 2 data out,
> > > Or more.
> > MORE ? I beleive that the fc0 is 3r2w (which give the 
> > number of register bank port). So ?
> 
> some units have "variable latency". IE the multiplier can give results
> with different latency, depending on the data chunk size.
> The different outputs are then "mixed" with the Xbar (sorry : 
> the big mux).

Previously you insisted on fixed latency. 

Remember my heretical scheduler design? See
http://www.hanssummers.com/computers/fcpu/scheduler.htm. With this design
you can easily have fixed latency, with exactly the same issue order and
completion order as your current scheduler design. But my design can very
easily be extended in future, allowing run-time optimisations because of
variable latency (early completion of execution units).

> 
> > nicO
> WHYGEE "programmer ou dormir, il faut choisir"...
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

------------------
Hans Summers
http://www.HansSummers.Com 
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