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Re: [f-cpu] the wrong way (or not?) concerning FP
On Wed, 29 Aug 2001, nicO wrote:
> Don't forget the complet FPU design from opencores.com. It seems to work
> but very slow.
Have downloaded it, but not yet checked.
> > I'd rather forget fdiv, for the moment. Concentrate in Level-1 FP,
> > that is: fadd, fsub, fmul, f2int, int2f, fiaprx and fsqrtiaprx (IIRC).
> >
> > fadd/fsub:
> > use my generic adder as the core element and add an
> > "input (de)normalizer" to it.
Where to find? In the snapshots?
> > fmul:
> > basically, an unsigned multiplier (like IMU, but
> > without all the bells and whistles like MAC and signed
> > multiplication) for the fractional part, and a small
> > (<= 16-bit) adder for the exponent.
Guessed though. But I rather intend to start with a diagram first
since the last diagramm from YG gave some aha effects...
> > fiaprx/fsqrtiaprx:
> > table lookup (8...16 entries) + some easy bit shuffling
> >
> > f2int/int2f:
> > bit shuffling
> >
> > Most units will also need a postprocessor for rounding, range checking
> > and so on. Shouldn't be too hard either (unless you try to be 100%
> > IEEE compliant).
Hehe, rounding is interesting. Maybe I will add that error
tracking we discussed earlier for the 32bit version...
Anyway first I have to read what has been stated about fpu
functionality in f-cpu documentation. Then propose changes
and afterwards implement it. ;-)
JG
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