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Rep:Re: [f-cpu] Manual 0.2.6
- To: <f-cpu@seul.org>
- Subject: Rep:Re: [f-cpu] Manual 0.2.6
- From: "Nicolas Boulay" <nicolas.boulay@ifrance.com>
- Date: Thu, 1 Aug 2002 09:38:57 GMT
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- Delivery-Date: Thu, 01 Aug 2002 05:39:12 -0400
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And what about an inter-chunk shift ? It will come will all the missing
inter chunk operation.
nicO
-----Message d'origine-----
De: cedric <cedric.bail@free.fr>
A: f-cpu@seul.org
Date: 01/08/02
Objet: Re: [f-cpu] Manual 0.2.6
> * Show me the proposed instruction form.
I have something different to propose. We currently didn't have any
instruction to load chunk after the 64 bits. Currently we use the
shifter to
do this and in fact it's not a good idea, if we want to write evolutive
code.
An idea is to propose a loadchunk that work like loadcons, but with
every
chunk size. With this we are scalable as much as we want and we can do
what we want with any registers size. And if we add this instruction,
the
loadconsp will be seen like a immediate form of loadchunk.
So what about this idea ?
> The "shifting loadcons" does the reverse and the shifting cost
> is put in the critical datapath of the Xbar. And shifting has
> a cost (don't tell me "it's only a mux").
;-)
Cedric
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