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Re: [f-cpu] Manual 0.2.6
- To: f-cpu@seul.org
- Subject: Re: [f-cpu] Manual 0.2.6
- From: Yann Guidon <whygee@f-cpu.org>
- Date: Thu, 01 Aug 2002 17:11:25 +0200
- Delivered-To: archiver@seul.org
- Delivered-To: f-cpu-outgoing@seul.org
- Delivered-To: f-cpu@seul.org
- Delivery-Date: Thu, 01 Aug 2002 11:02:18 -0400
- Organization: http://www.f-cpu.org
- References: <20020724195904.23896@thrai.stud.uni-hannover.de> <1027960615.3d456f27547ca@imp.free.fr> <3D45B6EF.455A037F@f-cpu.org> <200207311751.10396.cedric.bail@free.fr> <20020801023651.10519@thrai.stud.uni-hannover.de> <1028211750.3d4944267b7e0@imp.free.fr>
- Reply-To: f-cpu@seul.org
- Sender: owner-f-cpu@seul.org
hi,
just a little detail :
Cedric BAIL wrote:
> The idea is to have this capability for every register size (8, 16, 32, 64).
> We need this instructions to load register that are bigger than 64 bits (the
> shifter only work on 64 bits, and it isn't its job to work in a inter chunk
> capability).
beware : Michael did not implement inter-chunk shifts, but it is not a norm.
i would like to implement a different shifter structure which could shift
64 bits, even between two neighbouring chunks.
> Cedric
WHYGEE
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