Re: [f-cpu] condition checking and register atribote cache

[jaap stolk <jwstolk@yahoo.com>]

hi,

--- Michael Riepe <michael@stud.uni-hannover.de>
wrote:
> On Thu, Aug 01, 2002 at 05:32:45AM -0700, jaap stolk
> wrote:
> > hi,
> > 
> > im trying to add conditional instructions to
> > fcpusim, and have some ideas:
> > 
> > according to the manual there will be "cache" copy
> > of the flags, because reading a register is
> > rather "slow".
> 
> The scoreboard, yes.
> 
> > what i would like to do is use the x-bar read-bus
> > instead. this is possible, because the condition
> > register is read onto the x-bar (but not passed on
> to
> > any EU)
> 
> That may be too slow. If you have a zero condition,
> you'll have to OR all
> bits of the condition register - which will take
> some time (approximately
> 0.5 cycles).
>

depends on the timing of the x-bar, i was thinking of
puting this check for zero somwhere neer the direct
bypass. from that poin we need about 0.5 cycle, to get
the data to the EU anyway.
 
> > if the condition is false, we can simply disable
> the
> > clock signal that clocks the data and control
> > signals from the x-bar onto the EU's
> > (just like if there is a stall)
> 
> If the condition signal becomes available during the
> Xbar cycle, you
> can use the `enable' input of the EU. If it comes
> later, you'll have
> to issue the instruction speculatively, and discard
> the result.

at the moment i'm not using any enable signal.
the read ports only get clocked when the x-bar
writes to them, and the input is kept like that if
the EU is not used.

> 
> > and disable the clock signal that clocks the port
> > numbers into the x-bar write queue.
> > (just like if there is a stall)
> 
> That's not a problem because it happens several
> cycles later.

true, but if we can avoid geting the instruction in
the write queue, we can use the write "slot" for
somthing else (like a register move). also
if the register enters the write queue, it can couse
as stall in one of the next instructions.
so it would be nice to avoid is.
as fat as i can see, we can disable writing
to the queue just before the end of the x-bar.

> 
> > this will automatically fix the bypassing problem
> in
> > situations like these:
> > 
> > move    r2,r3
> > nop
> > move r3,r4,r5 ( if (r3) r5-r4; )
> 
> A compiler that generates this kind of code should
> be taken out and
> shot. You can use r2 as the condition register!

agree, i used move just as an example of a 1 cycle
instuction. (the nop shows that there would be one
stall anyway)

> 
> -- 
>  Michael "Tired" Riepe
> <Michael.Riepe@stud.uni-hannover.de>
>  "All I wanna do is have a little fun before I die"
>
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jaap.


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