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Re: [f-cpu] Register use
hello,
Thomas Lavergne wrote:
>
> Some times ago, someone have pointed out that we can't use all register
> as pointer or data, but only 8 of us. But I've searched all the manual,
> I can't find anything about that (except a section that say that f-cpu
> have general register so no reg dedicated for pointer)
> Could someone explain what is exactly this limitation and the reason of
> this chioce ?
Here are some explanations.
This is valid for FC0, F-CPU as a "ISA" is not directly impacted.
FC0 accesses memory through "split load" and "split stores".
The load and store instructions, when used with post-increment mode,
perform one half of the preceding load, and the first half of the
next.
For example, you want to code
a <= [b];
[c] <= a;
You do a prefetch to b, and store the pointer in R1
for example. Then load :
load (c-b),[R1],R2
which will increment R1 with the difference between
the two pointers, after having moved the location
pointed to by R1 into R2. For the next instruction
it's the same principle :
store [R1],R2
FC0 maintains a number of flags associated to
the registers, particularly whether the register
is a valid pointer or not (and thus, whether a load
or store using this register as a pointer will trap
or not).
One of the versions of FC0 can maintain at most 8 registers
as data pointers and 8 for instruction pointing (jump
target, useful for call/return stack). This version
is a bit limited but it's simple.
Other versions should appear which can associate more
registers, at a higher cost. I don't count on them
yet and i prefer to be careful when coding, i try
to reduce the pressure on the LSU.
FC0 behaves like F-CPU : all registers can be used
to point to data or instructions, but FC0 implements
this in such a way that using a lot of registers
will "spill" (like a cache that overflows). The
program's behaviour will be the same but with some
performance reductions.
I hope this helps.
> Thomas Lavergne "Le vrai rêveur est celui qui rêve
> de l'impossible." (Elsa Triolet)
WHYGEE
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