Re: Rep:[f-cpu] Hot issue : external LSU ?

["Christophe Avoinne" <christophe.avoinne@laposte.net>]

----- Original Message -----
From: "nico" <nicolas.boulay@ifrance.com>
To: <f-cpu@seul.org>
Sent: Saturday, August 31, 2002 4:40 PM
Subject: Re: Rep:[f-cpu] Hot issue : external LSU ?


> I don't refind the precise behavior of ll/sc. But i don't like too much
> to lock a precise adress line. This become to be a very limited
> ressource and raise many problem.
>
> And what about distributed memory where pages are duplicated ? But maybe
> ll/sc seems to be much more low level but it's seen by user. So what do
> you think about ?
>

First if cpu uses a normal load, it does operation on a precise address line
even locked since cpu doesn't matter !!! it is the case when cpu only need
to read a value : full speed. If cpu uses a normal store when a precise
address line is locked, either we choose to raise an exception because we
think it is a bad programming to do so, or we choose to let cpu write the
new value but it must also clear the lock bit to 0 so the next locked store
must fail : full speed. What's the difference ? we priviledge for
performance the normal load/store against the lock load/store, because there
should be very few interractions between the normal load/store and locked
load/store operations in the same address,  which is not the case for 'CAS'.
'CAS' is still a difficult instruction to realize because it only modifies a
content (write operation) when the first read value (read operation) matches
the expected value, so an atomical read-write transaction is not enough
since write is conditional and should be done by your bus !!! however, if it
is the CPU which realizes the read then write operation separately, you need
to have internal state for 'CAS' instruction, I think.

For intra-cpu locking, I don't see why it is hard to manage a locked
load/store (aka 'll/sc'). I did already talk about that with Whygee and it
seems feasible.

For inter-cpu locking, well you should first select it before things could
really slow everything down. As I suggested, locked load/store can have
suffix to be told whether inter-cpu locking is required.

You said that became to be a very limited ressource. Can you say why ?

About distributed memory where pages are duplicated ? neither 'll/sc' nor
'CAS' can be helpful directly on those pages since cpu never see the same
page, I fear.

I suppose the external LSU works in parallel with each internal LSU, when
need of course.

Please, I need more info about the way to implement CAS in f-cpu.

/Chris




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