Re: [f-cpu] GCC 3.1 for F-CPU port

[Yann Guidon <whygee@f-cpu.org>]

hi !

i still have to read the manual,
but i have no time yet :-(((

cedric wrote:

> > > > > which is without possible stall. Of course the "stall" slot
> > > > > will be probably used by compiler but not always. Do you
> > > > > know better code for small negatives ?
> > > > >          
> > > I was thinking that 8 bits immediates were signed. For other you need to
> > > use widden, but I was thinking that it only take one cycle. So I don't
> > > understand your stall.
> > >      
> > manual says (well I had to look into .tex for it) that widen has
> >    
> Interresting, I forgot to include widen.tex...
>
> > 1 cycle latency (it is regular EU, not as move or loadcons whose
> > emits value directly from decode FFs to xbar). Because gcc currently
> > can't schedule across basic blocks it often stalls at next insn after
> > widen.
> >    
> I am perhaps wrong but I think that bypass solve this problem
?

> (In fact if we 
> have a loadconsx, I think that it will use the same EU as widen).
your're thinking in terms of "your new loadcons", right ?
because otherwise there would not even need to be an execution unit.


> And in fact a latency of one is like having the result ready
>
> for next instruction. Is it true, Yann ?
>  
*beep* false :

it means that you have to put one NOP or another instruction
before you can use the result.

your idea would hold for the "oldfashioned" loadcons
but IIRC it was "changed" .... alors maintenant, "faut assumer" :-P

> Cedric
YG

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