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Re: Rep:Re: Rep:Re: [f-cpu] signed cmpl

I think Nico wanted to say if our "gcc expert" can tell us if gcc often
produces instructions where a 6-bit immediate is likely to be enough. If so,
it can be a gain, if not, don't bother too much with a 6-bit immediate.

----- Original Message -----
From: "Michael Riepe" <michael@stud.uni-hannover.de>
To: <f-cpu@seul.org>
Sent: Wednesday, December 18, 2002 1:57 PM
Subject: Re: Rep:Re: Rep:Re: [f-cpu] signed cmpl


> On Wed, Dec 18, 2002 at 09:45:05AM +0000, Nicolas Boulay wrote:
>
> > >>>Only our gcc expert could answer. So, does 32 to -32 number (or 0 to
> > 64) immediat instruction could cover most immediat instructions used by
> > gcc ?
>
> I don't need a gcc expert for that :) Since you can specify the size
> in the machine description, it's not a problem at all. Currently, there
> are RTL terms like
>
> (match_operand:SI 2 "regimm8_operand" "r,i")
>
> which refer to the C function regimm8_operand() - if you modify that
> to accept only 6-bit operands, you're done (for ALL instructions that
> can use this kind of operand). Everything that doesn't fit will be
> loaded into a register.
>
> --
>  Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
>  "All I wanna do is have a little fun before I die"
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