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Re: [f-cpu] Question and Ideas



hello and welcome, whoever you are.
Though you don't seem to come from another planet :-)

no spam wrote:
> Hi
> I have several question and ideas:
> 
> 1. What is the present status of F-CPU?
 * writing VHDL sources for the "execution pipeline". Next stages will then be
   the scheduler, then the memory interface (including L1 caches) and finally
   the exception/irq handlers+IRQ controller.
 * the manual is too old now, it should be deeply updated but we write VHDL
   and now "the source is the documentation".
 * website update : someone volunteered in france, he made a prototype of the
   new design at http://geeno.free.fr (from memory).
 * We are still trying to create an "association" in France. We are in contact
   with a CS school in Paris where we can have some support.
 * the F-CPU community is invited in Bordeaux in July for the LSM
   (Libre Software Meeting) by the organisers. i am waiting for the official
   invitation to appear on the f-cpu lists.

> 2. Can the webmaster create an easy to navigate, multiple pages website?
who ?  a webmaster ? "We're electronicians" ;-) Making websites is not as
cool as in the beginning, mainly because there are a lot of F-CPU ressources
scattered around the Web, some of them are even abandonned and the password
disappeared. If you want to help, or know volunteers, we'll be very very happy.

> 3. Is it possible to create F-CPU documents using PDF format? (easy to read and print).
Officially, the F-CPU manual is now written in LaTeX format.
This makes it easy for diffusion in PS and PDF formats, for example.

> 4. Is it possible to create Prototype of F-CPU in co-operation with local
> universities and EUROPRACTICE, TIMA-CMP, ALBA, etc?
(you forgot MOSIS ;-))
it should be. But the economics and politics of these programs are not fun.
for this to work we'd need support from at least ONE client university,
leaning that one or more doctorate level student spends 100% time on it,
thus money etc...
I am currently in a university department where they design chips and let
me tell you : it's not a supermarket. Even if the university shares the price
of the waffers, it's still VERY expensive to make a chip and from experience
it is also not likely to work on the first power-up...

> 5. Where is the evaluation board for F-CPU?
none yet. however you can have a look at the first f-cpu sources
at http://f-cpu.seul.org/new

> 6. Is there any LINUX port to F-CPU?
not yet. some f-cpu enthusiasts and subscribers are good at kernels
but the core of the Freedom CPU project is about CPU architecture,
not SW or kernels : this is to avoid losing energy with useless
discussions. If a kernel port is to take place, a "parallel" project
must be created. The operating system interface is not yet fully
determined so we are still open about what features must or must not
be implemented.

> 7. Is it possible to port BOCHS (X86 emulator), and portability tools,
> such as ANDF (ESPRIT), AMIGA DE, or JUICE (FTH Swiss)?
if you can port GCC, why not. but F-CPU is an architecture oriented
towards performance for low price and GCC is not designed for this,
so a GCC port is as difficult as making a wafer...

> 8. Can F-CPU compete with Pentium IV 2.2 GHz, PowerPC G5, AMD CLAWHAMMER,
> Transmeta Crusoe, ITANIUM, ARM 10 etc?
sorry, F-CPU is an architecture. You are speaking about implementations.
When F-CPU started, the computer at that time were Pentium II at 300MHz, btw...
F-CPU leaves certain options open _on_purpose_ so the implementor can
define a price/performance/scalability point. Frequency is explicitely not
our point because we already chose superpipeline, meaning that the operating
frequency depends on your EDA tool's optimisation capabilities and the
silicon process you can access.

> 9. What is the implementation of F-CPU, is it FPGA, ASIC, VARICORE or something else?
it's... VHDL :-)
theoretically you can "synthesise" VHDL to any electronic platform, whether
FPGA, full-custom, semi-custom, sea-of-gates... in practice, the recent discussions
on this group (about the register set) showed that it's not so simple. But VHDL
is a langage which allows us to NOT duplicate most parts of the design, whatever
the target implementation is.

nd by the way, implementing the current F-CPU core ("FC0") on a FPGA requires
a pretty huge FPGA which is extremely expensive...

> 10. I have idea about creating hand crank Wireless PDA for low cost Internet
> access device in Africa,
I'm not a specialist but the wireless infrastructure varies wildly from region
to region...

> similar to SIMPUTER project in INDIA (fund from UN / EU).
> Is it possible to use F-CPU on this project?

it is not impossible, but you may loose a lot of time waiting for F-CPU to
become a real chip. You can probably reuse the simputer and/or Leon.
Other projects (mostly unfinished) can be found on the database of
http://www.opencollector.org

> Thank you.
I hope this helps,

read you soon,

WHYGEE
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