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Rep:Re: Rep:Re: Rep:Re: Re: [f-cpu] No latches, please !



-----Message d'origine-----
De: Michael Riepe <michael@stud.uni-hannover.de>
A: f-cpu@seul.org
Date: 18/02/02
Objet: Re: Rep:Re: Rep:Re: Re: [f-cpu] No latches,
please !

On Mon, Feb 18, 2002 at 08:56:40AM +0000,
nicolas.boulay@ifrance.com wrote:
[...]
> >>>> BIP ! Nop ! That's the common mistake. An rs
> bascule is composed by 2 latches with the second
used
> inversed clock. A fliflop use a pulse generator to
> trigger a single latch (so it's transparent only
few
> times, that's create the setup and hold time,
that's
> why IBM prohibite flipflop).

The `rs bascule' (whatever that is supposed to mean)
is also called

>>> Sorry, i didn't know how to translate it.

`master-slave-FF'. The latches `lock out' each other;
ideally, there is
no transparent phase (depends on the timing). But
it's almost twice as
big as the pulse generator version.

>>> I don't think so. When you see the powerPC
version of this device, it's pretty small compare to
the one from AMD  K6 for exemple.
Nowdays, there are very different design for flipflop
Master slave or not. It's a ratio between speed, size
and power consumption.
nicO

-- 
 Michael "Tired" Riepe
<Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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