Re: [f-cpu] "Tree"

[Ben Franchuk <bfranchuk@jetnet.ab.ca>]

Bruno Bougard wrote:
> 
> Hi All,
> 
> I have some remarks about this 'Tree story':
> 
> You give me the feeling that you apply some kind of bottom-up
> methodology. Building your design from the lowest level to the highest.
> Professional IC designers always work top-down, from spec to gate level,
> through different abstraction level.

I would expect that all levels of development Top-down , bottom-up ,
middle out  , low level software - user code  , high level software - OS
code , I/O interfacing , network  topology are important.
I would suspect most IC designers don't have the time or freedom
to fully develop the design -- if it works 99% ship it!

What I  think what the F-cpu needs now is the documentation revised
and a software emulator written for the ISA. Until you write software
you really don't know if your architecture is sound. For my own small
CPU's I like developing between the ISA and the RTL levels. I developed
a nice 9 bit CPU on the ISA level only to discover at the software level
the design sucked and at the RTL level it used more FPGA logic cells
than
my other 12 bit CPU's.
-- 
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html
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