Re: [f-cpu] PS

[Ben Franchuk <bfranchuk@jetnet.ab.ca>]

"Yann Guidon [systeme]" wrote:
> 
> Looks like we'll need a separate, low-latency and simple protocol for both interrupts and semaphores.
> Something located in an independent address space (if any), with no caching quirks and which communicates
> almost directly (but point-to-point) with other cores. That's not difficult to do but i have to make sure
> this doesn't already exist. The VCI stuff is more important now because the memory interface must
> be designed, the IRQ and semaphore machinery is to be designed a bit later.

But would not the memory interface still need to be partially defined
as semaphores are atomic functions?
-- 
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html
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