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Re: [f-cpu] loadconsx and stream hints



On Wed, Jan 08, 2003 at 11:44:49PM +0100, devik wrote:
> Please can someone explain me syntax and semantic
> of latest loadconsx (and loadcons.n) so I can add
> them to gcc ?

Your .md pattern for loadcons.<n> is already correct. Loadconsx.<n> is
similar: It puts the 16-bit constant in chunk <n>, but it also stuffs
all higher chunks (<n+1> up to the maximum) with copies of the sign bit
of the immediate operand.

Syntax & encoding:

	loadcons.n $uimm16, r1

	31-24	OP_LOADCONS
	23-22	chunk index (0...3)
	21- 6	16-bit unsigned immediate
	 5- 0	r1

	loadconsx.n $simm16, r1

	31-24	OP_LOADCONSX
	23-22	chunk index (0...3)
	21- 6	16-bit signed immediate
	 5- 0	r1

The assembler aliases are:

	loadcons $uimm64, r1	// written without a chunk index
	loadconsx $simm64, r1	// written without a chunk index

I'm still experimenting with the semantics. Several optimizations are
possible: `loadcons $0, r1' could result in `move r0, r1', powers of two
could be created with `bseti', and so on. If you specify short numbers
(like `loadconsx $-1, r1'), a single instruction will be emitted. On
the other hand, if the immediate operand is not known at assembly time,
the assembler will generate the full 4-instruction load sequence plus
relocation entries, and the linker will have to fill in the value:

	.text
	loadcons $data-.-4, r1	// value of `data' is unknown
	loadaddrd r1, r1		// it's unwise to use `loadaddrid' here
	load r1, r1

	.data
data:
	.long some_value

I'm not sure what the assembler should do if you use `loadcons.n'
with a symbolic constant or label. Currently, it complains that it
hasn't been given an `absolute' or `integer' value. Additionally,
it will warn you if the operand is out of range (0x0000...0xffff for
loadcons, -0x8000...0x7fff for loadconsx). But it's also possible to
permit something like

	loadcons.2 $label, r1

or, more correctly,

	loadcons.2 $label>>32, r1

(the assembler will generate relocation entries if the value of `label'
is unknown).

BTW: I also consider a `small' memory model where all addresses are
limited to 32 bits. It will save a lot of loadcons instructions, and
may be particularly interesting for small machines, embedded systems
and so on.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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