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Re: [f-cpu] about register mapping



On Sun, Jan 11, 2004 at 02:32:43AM +0100, Yann Guidon wrote:
[...]
> >In and out are alias for read/write on the "I/O bus" of the x86. This io bus 
> >is the normal bus + a bit saying "we make a IO transfert". So in fact, it's 
> >like a adresse bit !
> >  
> >
> it was something like that in the 8080, 8085, 8086 and maybe 80286
> but today, and at least since the P2 core, it's different considering
> address space (64K max), strong access ordering, memory buffers
> and many other subtleties that don't make it a real memory.

Let me add that most processors don't have a separate I/O address space
at all.  It's an Intel thing.

We certainly need some mechanism to physically access external I/O
devices.  But do we really need separate instructions?  I guess not.
All we have to do is (re)direct read/write requests to the F-BUS.
The core will waste a lot of cycles waiting for the results, but that's
true for Intel CPUs as well.  The alternative is to use a DMA (or,
more general, data transfer) engine that operates in the background
and signals the CPU when it has done its work.

Of course the F-BUS should support "split transactions".  If you send a
read request, you don't want the bus to block while the peripheral is
"thinking about" its answer.

In order to avoid all the PC idiosyncrasies, the whole thing should
be software-configurable -- no fixed addresses like 0x300.  It will
be the firmware's task to detect buses, enumerate the devices on them
(including other CPUs), assign I/O address ranges to the devices,
and install the appropriate drivers which initialize and enable the
corresponding devices.  But that's not really a CPU hardware design
problem, so we can ignore it (for now).

On-chip peripherals can be accessed in the same way if they're properly
designed.  From the firmware's point of view, the only difference
will be that they're connected to another bus (probably a virtual one).

The question remains whether a particular feature must be implemented
as a special register, or can be added as an on-chip peripheral.
If something has special execution semantics (like a serializing
effect), it must of course be implemented as a special register.
But everything else could also be put into an on-chip peripheral.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"

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