Re: [f-cpu] FOSS compliant GPU design

[Yann Guidon <whygee@xxxxxxxxx>]

ouch ! everytime someone posts here, i get 10 bounce messages ....
so i'm not unhappy when the list is quiet :-P

Olivier Guerrier wrote:

> Not directly related to f-cpu, but still interesting...
> Same motivation, different goal

hmm motivation ? not exactly ....
i see many differences, such as the unnamed
fight between free and open ... Not only they consider
the HDL to be "too cryptic for the user", and they will
release it whenever / if they want, but they don't even
care about the openness and portability of the source code
(if that's what i read between the line,as they certainly use
the FPGA maker's tools and stick to it).

So, in my opinion, this doesn't solve much things in my eyes.
The experience of the leader is meaningful and
the project certainly has a lot of value for the kernel people
(i'm thinking of the old good matrox tweaking age),
but it won't go beyond. Even their HW is so "high tech"
that only the company can make it properly.

They fell under the "crowd's pressure" to add this and that,
and the result is a complex and expensive card that
can not easily be replicated.

So think "open", not "free" as F-CPU.

However, it looks more promising than the "manticore" project,
released a while back :-) And i'm curious about the licence that
will be chosen when/if the Verilog source will be released.

> http://kerneltrap.org/node/4622
>
> "The Open Graphics Project is a collaboration between the Free and Open
> Source Software (FOSS) Community and Tech Source Inc. to develop new 3D
> graphics products that are compatible with Free Software, both
> philosophically and practically. The project is currently designing an
> "open source friendly graphics card"
>
> Furthermore, I've read this in comments:
>
> "In the documentation is clearly stated that they use a Xilinx Spartan
> III 2000 FPGA as a GPU"

can someone find the datasheet of this part ?
what grade ? how many gates ?

> and
>
> "It will be especially nice to be able to send out bug fixes for the
> FPGA. This will require that we have logic in the FPGA which allows
> reprogramming of the FPGA serial PROM with a new bitfile. Reprogram,
> cycle power, and voila, you have reprogrammed it.
> Take note that there's only one FPGA, and the host controller is part of
> our design. If you want to reprogram the card with your own logic, feel
> free to do so, but you'll need your own host interface. I believe
> opencores.org has a PCI controller you can use. We'll document how to
> reprogram the serial prom both via our host interface and via headers on
> the board."
>
> Maybe a potential sandbox to try some f-cpu parts ???

and more, who knows ? :-)

well, i've just bought a win2k laptop especially for running 
"proprietary" electrtonics SW.
such as synthesisers. it won't be really fast but at least i'll be able 
to do it, now.
All the FPGA vendors had promised linux ports of their synthsisers and 
none works now,
these guys are really shameless.

> Regards,
> Olivier

YG

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