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[f-cpu] Reamrks and suggestions about the manual
- To: FCpu English <f-cpu@seul.org>
- Subject: [f-cpu] Reamrks and suggestions about the manual
- From: Thomas Lavergne <thomas.lavergne@laposte.net>
- Date: Sun, 07 Jul 2002 14:36:01 +0200
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- Delivery-Date: Sun, 07 Jul 2002 08:41:29 -0400
- Organization: THallium Software
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Here's some remarks about the ISA decritpion in the manual, some are
little write error, other are remarks about coding of the ISA...
Page 94
-------
You have these two form defined at the start :
addsubs r3, r2, r1
saddsubs r3, r2, r1
but no explication of the s suffixe later
Page 104
--------
At the start you have :
scmpli r3, r2, r1
instead of :
scmpli Imm8, r2, r1
Page 114
--------
The lines :
l2int r2, r1
sl2int r2, r1
Must be changed to :
l2int[r/t/f/c] r2, r1
sl2int[r/t/f/c] r2, r1
For the rouding mode, if we use the bit 12-13 instead of the bit 11-12
the assembler can use the same constant for encoding l2int instruction
and f2int (see page 144)
Same reflexion for int2l.
Page 128
--------
You have the following lines :
bitrev r3, r2, r1
bitrevo r3, r2, r1
bitrev r2, r1
bitrevo r2, r1
but if we follow the convention used for other operand you must write it
like :
bitrev (r3,) r2, r1
bitrevo (r3,) r2, r1
(see popcount)
Page 130
--------
For PopCount the reg for have r3 optional so the Imm form have the Imm8
optional (default 0)
For Bitrev we have the same for the reg form but not for the Imm form.
I think for uniformity of the ISA, we can set the Imm8 optional (default 0)
Page 131
--------
byterev have the form (Imm8, r2, r1) but not use the Imm8 field, for the
other operand we usually use the form (r3, r2, r1) for this case (allow
more flag).
Page 137
--------
This definition of the logic operand does not compail with the
implementation of the rop2 unit, here the function was encoded with 4
bits and in the rop (see at page 52) the function was encoded with 3
bits and decoded with a lookup table.
So you don't have the same functions avalable : not was not imlemented
in the rop2 unit.
Page 139
--------
You don't explain the encoding of the flags xtcs, I suppose it was the
same than for the bitop operand but it could be could to say it.
At the top of the page you say 'logici.xxxx' so I understand this style
of codding 'logici.0111' like for the logic operand but ater you say
'logici.s' like for bitop, we must clarify this and I think it was best
to have the same form for logic and logici even if we don't have all the
function of logic in logici.
Page 146
--------
Same remark than for byterev page 131 (see bellow)
Page 147
--------
Same remark...
Page 151
--------
Same remark...
And at the top you write :
fsqrt r3, r2, r1
instead of :
fsqrt r2, r1
Page 154
--------
At the top you have write :
smac r3, r2, r1
smacx r3, r2, r1
instead of
sfmac r3, r2, r1
sfmacx r3, r2, r1
Page 162
--------
At the top you have write :
loadie r3, r2, r1
instead of :
loadie Imm8, r2, r1
Page 166
--------
cachemm have a form (op[8], flag[8], 0[4], r2[6], r1[6]) not referenced
at the start of the manual page 69
Page 184
--------
loopentry use a non standard form (op[8], 0[18], r1[6])
Page 187 and more
-----------------
Same remarks ...
Forms remarks
-------------
Page 69 you describ a form : (op[8], flag[12], r2[6], r1[6]) and used
only at the end of the manual (the first was get), but it could be used
in a lot of case, ie when we don't need the r3 register, and it could
solve the problem for cachemm (who don't use a standard form)
--
Thomas Lavergne "Le vrai rêveur est celui qui rêve
de l'impossible." (Elsa Triolet)
thomas.lavergne@laposte.net
d-12@laposte.net ICQ:#137121910 http://assoc.wanadoo.fr/thallium/
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