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Re: [f-cpu] register move in 1 x-bar cycle



hi,

btw, i found YGASM has some rop2 code, but
it won't do 3r1w :(
but rop2 sould work in the simulator now...

jaap

--- Yann Guidon <whygee@f-cpu.org> wrote:
> hi,
> 
> jaap stolk wrote:
> > 
> > hi,
> > 
> > this could be a simple typo, but
> > according to the manual (chapter 6)
> > a register move looks like this:
> > 
> > Fetch > Decod         > Xbar      > Register write
> >        (+reg read)     (+schedule)
> >        (+bypass check)
> > 
> > i would like to turn that into
> > 
> > Fetch > Decod         > Xbar    >  Xbar  >
> Register w.
> >        (+reg read)     (+schedule)
> >        (+bypass check)
> > 
> > ther will be no extra lost cycle (the next
> instuction
> > will use a direct bypass instead of a delayed
> bypass)
> > http://f-cpu.seul.org/whygee/parinux/conf_yg.html
> > seems to conferm this.
> > 
> > i tryed doing it in one cycle in the c simulator,
> > but it has the folowing complications:
> > 
> > -its a reversed bypass (so we need extra hardware
> >  to bypass FROM the read bus TO the write bus)
> > -we can't use the schedule queue for the register
> >  write (schedule cycle is to late), so we have
> >  to control the xbar directly from the decoder.
> > -the x-bar needs to ignore these commands from the
> >  decoder in normal operation.
> > 
> > can we change it into two x-bar cycles ?
> 
> you're right, the manual is not up to date.
> 
> btw : could we add a modification date to each
> instruction
> in the manual ? This would help people understand
> what document to trust if there is such another
> problem.
> 
> > jaap.
> WHYGEE
>
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