Re: [f-cpu] New snapshot for EU_INC and EU_CMP

[Michael Riepe <michael@stud.uni-hannover.de>]

On Wed, Jul 31, 2002 at 04:18:02AM +0200, Yann Guidon wrote:
[...]
> > After the first synthesis experiences, I later added another rule:
> > 2-input xors count as 2 gates, and the sum of gate delays must not
> > exceed 10. I call this the `6G/10T' rule.
> what is 'T' ?

Transistors, more or less.

> > [...]
> 
> > MSB1 is supposed to return the *number* of the most significant `1'
> > bit: msb1(0xffffffff) = 64, msb1(0) = 0. Currently it returns some
> > strange bit mask. Likewise for MSB0.
> 
> This feature has been dropped, particularly if popc is implemented :
> you can feed the bit mast to POPC which will return the number of bits.

Oh, really? Then you forgot to tell us (and update the manual).

> Of course there are faster ways to implement that, but there is no
> reason of adding one cycle of latency to the units. Particularly
> if it's not used often.

Latency is not an argument in this case. In fact, CMP/SORT have higher
latency than the original MSB[01].

Please restore the old behaviour.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/