Re: CAS and spinlocks (was: Re: [f-cpu] another DATE report)

["Christophe" <christophe.avoinne@laposte.net>]

Well there is a lot of missing things in VHDL source so it would be quite
difficult for me to do something since I don't have the slight idea of
implementation you want to make, especially regarding with memory. And please
don't forget, I'm a programmer, not a VHDL guru. I can read VHDL but don't
think for you. If you want me to do something I first need more materials than
I can find in your source to be able to figure out how to proceed (a lot of
details about the implementation of your F-CPU sound fuzzy to my ears for the
moment).

----- Original Message -----
From: Yann Guidon <whygee@f-cpu.org>
To: <f-cpu@seul.org>
Sent: Tuesday, March 19, 2002 3:26 AM
Subject: Re: CAS and spinlocks (was: Re: [f-cpu] another DATE report)


> hi,
>
> Michael Riepe wrote:
> > On Mon, Mar 18, 2002 at 10:32:10PM +0100, Christophe wrote:
> > [...]
> > > I think to have a single CAS is a minimum. To have a CAS2 can really
boost
> > > compared with its software implementation. But, ok, let us first to try
to have
> > > an efficient CAS. Afterward we can try the impossible :-)
> >
> > That comes second. First, let's build something that *works*.
>
> i like you more and more, Michael :-P
>
> i don't like to read "we can try the impossible :-)"

Oh come on. I really know it is very difficult but I would wait to see how we
can code a CAS before deciding if a CAS2 cannot be done. That's all. Yourself
you said : "impossible is not french".

Anyway, I'm not speaking about to have an instruction CAS2 but something like
two CAS linked IF IT IS POSSIBLE.





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