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[f-cpu] usage of 64 registers
- To: f-cpu@seul.org
- Subject: [f-cpu] usage of 64 registers
- From: Martin Devera <devik@cdi.cz>
- Date: Wed, 27 Mar 2002 14:53:21 +0100 (CET)
- Delivered-To: archiver@seul.org
- Delivered-To: f-cpu-outgoing@seul.org
- Delivered-To: f-cpu@seul.org
- Delivery-Date: Wed, 27 Mar 2002 08:53:24 -0500
- Reply-To: f-cpu@seul.org
- Sender: owner-f-cpu@seul.org
Hello,
I'm fairly new in this area as I focus mainly on linux
kernel developement.
But this project impressed me and I started to learn more
about it. I've some question and I hope someone can answer
them (and yes I looked archives first to not repeat FAQ).
First during my developement days I never seen algorithm
(except unrolled loops) which can use 64 regs in one stack
frame range.
Why didn't you consider register rotation ala ia-64 which
allows you to simply generate function calls without memory
ops and to do sw pipelining ?
Also I've heard that there are problems with SPARC's register
window usage, can someone clearify it ?
Second question is, how can be the XBar constructed in CMOS ?
Is 4*64 to 4*64 xbar simply 1024 pass-thru gates (N-P mos pair)
plus tree of invertors to accomodate this fanout ?
Or will it consist of latches per port ?
Thanks,
devik
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