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Rep:Re: [f-cpu] page managing



-----Message d'origine-----
De: Kim Enkovaara <embo@mpoli.fi>
A: f-cpu@seul.org
Date: 04/05/02
Objet: Re: [f-cpu] page managing

> i propose to do it with edram,  3Dlabs do it in it's new graphic chip
:
> http://www.tomshardware.com/graphic/02q2/020503/p10vpu-04.html

edram technology is very expensive and the yields go down. There are
even
different ways to do edram. Some vendors use digital process and quite
big
amount of extra masks to build the dram structures (digital process
makes
the dram density lower). Some vendors use pure dram process and that on
the other hand makes the digital logic slower and bigger. And there are
only few vendors that support edram. It is difficult technology to
master.

NRE costs of edram are also quite high, because the needed extra masks.
In
my mind 1T-SRAM technologies are usually more feasible (Mosys, Ramtron
etc.) Also 1T is quite expensive technology and is only supported on
some
vendors processes (TSMC and UMC are safe bets).

>>> I'm almost sure that i will change in 2 years ! (When i say edram, i
think of a memory technology that maid easy to put many Mbyte  inside
the chip) For many reasons, edram are a good thing : for power
consumption (no more the 100 power transistor to get out of the chip to
access the memory), the board/package will became cheaper (less pins and
less wire), for the performance, ...
For so many raisons, it will be widely used. L2 cache are the first
candidate.
nicO

--Kim

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