Re: [f-cpu] accelerator

[Yann Guidon <whygee@f-cpu.org>]

yet some more :

http://www.alatek.com/pages/hes/hes_faqs.html#a18

it would be possible to plug the HES board on a RH7.2 PC.
it costs some $40K however... There is at least one Virtex
and some SDRAM per PCI board :
http://www.alatek.com/img/products/hes/HES_Ov11.gif

However this FAQ also writes :
> All DVM version 2.x and below do not support gated and
> divided clocks.  A user must manually handle all timing
> issues connected with gated and divided clocks, while
> implementing them into an FPGA device.

maybe the cost could be shared with the VHDL association
that is also hosted by EPITA ? :-) The board seems to
be possibly delivered with a fully-configured SUN Blade.

They also have a "IP cores" page that looks a bit like
this at opencollector...
http://www.alatek.com/pages/ipcores/ipcores_main.html
(just for the similarity). However, Alatek looks more
advanced and most cores look too complex for OpenCores'
team.


WHYGEE, trying to setup his laptop with both sound,
PCMCIA and network... USB already works so i don't complain :-)
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