Re: [f-cpu] whygee's Nth slaughtered ROP2 version

[Michael Riepe <michael@stud.uni-hannover.de>]

On Mon, Nov 26, 2001 at 12:22:06PM -0500, Josh Fender wrote:
[...]
>   If someone was to provide a working set of units, I could try them all
> out.  I could try the multiplier unit aswell as the FPGAs I am using are
> relatively large (approximately 40000 Look up tables/ Flip Flops units).
> It might not fit but its always worth a try.

I just uploaded my latest versions of the ASU, IMU and SHL units to
http://www.seul.org/~f-cpu/new/fcpu-mr-20011127.tar.gz -- feel free to
grab the tarball and try them out.

>   I am curious about the target of the F-CPU.  A lot of the design seems
> to be oriented towards FPGAs and their four input logic, yet the
> multiplier most certainly is not.  So my question simply is:  What is the
> current target platform for the first F-CPU?  Is it an FPGA or a custom
> chip.

AFAIR, we try to be as target-independent as possible.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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