[f-cpu] Re:

[Johannes Schemmel <jschemme@ix.urz.uni-heidelberg.de>]

Hi Justin,

for a digital design you are right, but our ASICs are analog ones. We
have
already produced two versions of our analog neural network. In fact we
are using Xilinx chips to implement the training algorithms.

Regards, Johannes

justin anderson wrote:
> 
> Hi guys,
>         from what I have seen you are wanting to produce an ASIC. Just wondering
> what would be involved if a person were to use a large high speed FPGA as a
> processor.  Large devices are in the order of 10M gate running at 400MHz, from
> Xilinx.  This allows you to design a computer which can be changed.  The speed
> tracks fpga technology and as larger faster fpga's are release so to will the
> processor grow.  With some of these fpga's sections can be reprogrammed in
> operation.  This allows for possible software acceleration tailored to a
> specific application eq. graphics or sound processing.
> 
> cheers Justin
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-- 
Dr. Johannes Schemmel
Kirchhoff Institut fuer Physik / Electronic Vision(s)
Universtitaet Heidelberg             Tel: ++49-6221-548927
Schroederstr. 90                     Fax: ++49-6221-544917
D-69120 Heidelberg                   schemmel@asic.uni-heidelberg.de

http://www.kip.uni-heidelberg.de/vision
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