Re: Re: Re: [f-cpu] X-Bar replacement and PoC of massiv-parallel-computing, hint

["Marco Al" <marco@simplex.nl>]

From: <whygee@club-internet.fr>

>  - i don't think that internal databuses can use LVDS :-)

For what its worth the Russians (Elbrus) were going to use it for the E2K :)
(And although I cant find it right now I distinctly remember someone
knowledgable downplay that fact on Ace's by pointing out it had been done
before.)

"Circuit Design
Advanced circuit design has been developed in Elbrus project to support ex-
tremely high clock frequency implementation.It introduces two new basic
logic elements (besides traditional ones):

- universal self-reset logic with the following outstanding features
. No losses for latches
. No losses for clock skew
. Time borrowing
. Low power dissipation

- differential logic for high speed long distance signal transfer

This logic supports 25-30%better clock frequency compared to existing most
advanced microprocessors."

Personally I think it might be well suited for a large X-bar, would require
simulation to find it out for sure one way or the other, but you probably
need to design your own cell's (standard I/O LVDS cell's wont do ... you
dont need most of the signal conditioning and it doesnt need to drive nearly
as much current as for an external connection Id guess). But for a high
performance processor some custom work will always be necessary.

Marco

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