Re: [f-cpu] X-Bar replacement and PoC of massiv-parallel-computing,hint

[Kim Enkovaara <kenkovaa@cc.hut.fi>]

On Wed, 10 Oct 2001, Yann Guidon wrote:

> However, there would be one solution to speed up this critical part :
> use 3.3V locally (if we use ie a 2.8 or 2.5V technology).
> I have "learnt" this morning that the rising/failing time of CMOS
> gates that load capacitive/resistive depends on the Vdd.
> The buses of the "Xbar" are long and very resistive : high current
> and high(er) voltage (than "core logic") is probably necessary
> to compensate...

I hate to dissapoint you, but usually only one core voltage is supported
inside the digital logic. Only IO rings can have additional voltages.
If you need faster gates you select some high performance cells that use
more space and have bigger transistors in the layout.

=============================================================================
Mr. Kim Enkovaara   | kim.enkovaara@iki.fi | Microelectronic Riemannian
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