Re: [f-cpu] question to shifting unit

[nicO <nicolas.boulay@ifrance.com>]

Michael Riepe a écrit :
> 
> On Wed, Oct 10, 2001 at 05:25:12PM +0200, Andreas Romeyke wrote:
> [...]
> > Erm, why we use parallel shifting than
> > use registers/acummulation instead?
> >
> > I see, that a shift of 3 or more needs more cycles than parallel-shifting,
> > but often we need a shift of one or two.
> 
> Hmm... we could add single-bit shift instructions that need one cycle,
> and do the multi-bit shifts in 2 cycles.
> 

To extract bit field we need to do a shift then a mask (so a 3r1w
operation), it could be done using 2 instructions but 1 instruction will
reduice the register bank pressure and maybe reduice the overall
latency, the last stage will be a simple and.

s&m 4, 3, R1, R2

So r2(3 downto 0) = r1(7 downto 4)

Comments ?

nicO

> --
>  Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
>  "All I wanna do is have a little fun before I die"
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