Re: [f-cpu] registers

[Just an Illusion <illusion_to_net@yahoo.fr>]

Hello Mohamed,

Like you can see this list must be write in english, if you have some 
problems with the Shakespeare language, try some web translator, like 
http://www.freetranslation.com this is certainly not the better one, but 
it's usefull.

Otherwise, you have the french f-cpu list to have some non technical 
info on f-cpu.
This french list discuss about planning activity around f-cpu for french 
members (and more especially for Parisien people).

If you want contact a specific people on list, use his address.

Thanks
Just an Illusion

Mohamed Ali Kilani a écrit:

> Salut cedric,
>
> Je viens de debarquer y a pas longtemps dans la planete F-CPU et j'ai 
> commence par lire le manuel. J'ai recupere un Snapshot et j'ai regarde 
> ou en etait les differentes EUs.
>
> Je suis interesse par aider sur l'EU de la division entiere.
> J'ai vu que t'as deja designe une unite qui gere au niveau 8 bits 
> unsigned. J'ai vu aussi que tu obtenais le resultat en 7 cycles.
>
> Je voulais savoir, quelles etaient les contraintes qui sont imposees 
> au niveau timing, perf, taille a l'implementation etc.
>
> J'ai pas mal de documentation de cours anciens que j'ai pris sur de 
> l'arithmetique hardware. Je vais essayer de voir ce que je peux en 
> sortir.
>
> A bienot
>
> Dali
>
> Cedric BAIL wrote:
>
>>> [You]
>>> Nowadays we too often think about 64 bits register length. so 64 ==
>>> the biggest int number. But in fact, the most interresting vector 
>>> size is
>>> 256 bits.
>>
>>
>>  
>>
>>> As you can see, using a register of 256 for storing an integer of 64
>>> bits is a big waste ! Look at our programmation api. We always have 3
>>> or 4 pointers in the register set, so 3/4 of the register will never be
>>> used 95% of the time, what a waist, don't you think ?
>>
>>
>>
>>> {I}
>>> Okay, single integer can be only in 64-bit even if physically they are
>>> 256 bit. So you prefer to split and use a different register-bank 
>>> instead.
>>> The trouble if we consider using vector integer registers are much more
>>> underused than single integer registers, well we still waste memory
>>> indeed for 95% of the time wherever the 3/4 of 256-bit for registers 
>>> are
>>> physically
>>> located :).
>>
>>
>>
>> And perhaps more, because you always need to save all your register, so
>> you have 256*63 + 64*63 = 20160 (2520 o => 2,5 Ko) instead of 256*63 
>> = 16128 (2016 o => 1,9 Ko). So you loose more place and you increase
>> needed move when you work with SIMD.
>>
>>
>>> Sparc V8 arch use 32 windows register (>100 registers but only 32 
>>> seeing
>>> in a given time). When you add the fpu you receive 32 registers
>>> dedicated to the fpu (the 32 fpu regiter are 32 bit but you could 
>>> access
>>> it by to for 64 bit double).
>>
>>
>>
>>> i have ask to our expert why adding new register set and not use the
>>> integer register bank. I had in mind the f-cpu approach.
>>
>>
>>
>>> This answer was quite simple : "to use more register" !
>>
>>
>>
>> I think it's not the real reason. Because when you have 64 registers for
>> int and float you can produce better code with less data in memory 
>> than with
>> 32 registers for int and 32 registers for float. In a normal application
>> you don't use a lot of float (and SIMD), so you can't use them for 
>> int (or scalar). In fact by dividing the registers bank, you waste 
>> capacity from
>> my point of view.
>>
>> A+
>>   Cedric
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>> ______________________________________________________________________
>> Etudiant: Wanadoo t'offre le Pack eXtense Haut Débit soit 150,92 euros
>> d'économies ! Clique ici : http://www.ifrance.com/_reloc/mail.etudiant
>
>
>
>
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