[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Re: [f-cpu] today's idea : JTAG console !



hi !

>De: Just an Illusion <illusion_to_net@yahoo.fr>
>
>Hi,
>
>The JTAG intreface can be a good point, but I think it's too early.

i don't think so. Have you ever heard about "DFT" ?
not "Discrete Fourier Transform" but "Design For Test" :-)
If F-CPU wants to be successful, it needs tests to be
tightly integrated in the development. If we can extend
some of the test functions, it's the right time now.
I have already started investigating the BIST architecture,
and integrating a JTAG core will help reduce duplicated
functions. For example, BIST needs a pin to indicate
whether the test failed or succeeded. JTAG defines this
already :-) so no need to allocate one more pin.
This is one example.


>First, because the JTAG is an On Board Test mechanism, then we need a 
>full CPU (after production) and its board.

not necessarily ! we can already simulate JTAG in VHDL
and/or C, along with the whole core. This allows us
to start developping the test SW. And JTAG is not _only_
an "On Board Test mechanism", it is used in many situations
like non-intrusive debugging or performance measurements.

For example, i have a book that deeply describes the
way to access some of the MSRs of the Pentium CPU
so an external computer can "plug" some wires in the
tested computer and read performance counters, HW status
registers etc...

Adding a couple of JTAG registers is not complex and
helps solve some problems, like : what HW and SW interface
do we use to communicate with the core and the EPROM
when no keyboard, no RS232 and no screen is available ?

This "only" requires 2 SRs in the core and a simple
(ACK-based ?) handshaking protocol. After all, it's
not designed for performance but for portability and
simplicity.

>Second, if we implement the FC0 into a FPGA, some of them have yet a 
>JTAG interface implemented (or the code is given by tools).

yup but nothing keeps us from adding a parallel JTAG
path inside the logic. Then the paths can be chained :-)
this will reinforce confidence in the "custom" JTAG code too.

>Third, if I well remember, you can find some yet done JTAG interface on net.

cool ! [URL] ?...

>Bye,
>Just an Illusion
Read you,
YG


*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/