Re: [f-cpu] gate level netlist

[Yann Guidon <whygee@f-cpu.org>]

hi,

Gilbert Chen wrote:

> Just want to ask if I can get a gate level netlist of f-cpu.  By "gate
> level" I mean a circuit consisting of AND, OR, and NOT gates. Is it
> possible?  If so, how?
>  
only high-level VHDL is available,
working at the netlist level is too hard for humans
and is too technology-dependent.

some of the existing units, however,
have a rather simple VHLD-to-gate transcription
but it must be done "by hand", if you don't
have a synthesizer.

> Thanks
> Gilbert
YG

*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/