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Re: [f-cpu] F-CPU fetch unit




--- Yann Guidon <whygee@xxxxxxxxx> wrote:
> 
> no worries here.
> http://whygee.club.fr/LiIon/pack_ultraportable/index.html
> (end of french shameless autopromotion)
hey, nice ideea with the double sided scotch tape. I have 2 holes in my laptop because I mixed
some screws at reassembly.....

> >Also it seems that there is a need to sometimes instruct the fetcher to begin fetchig from an
> >address that is in the register set. Is this right so far?
> >  
> >
> right.
> This happens so that said register is "associated" or "mapped" to a 
> Fetcher's line.
> The allocation is quite complex because all the above feature work 
> together at the same time.
> unwanted side effects will maybe prove difficult to remove.
> But this latency must be hidden by an explicit prefetch.
> 

are there only N_LINES register that can be associated to the Fetcher or any register can be
associated with any line?

> That's one reason why i started to play with the VSP :
> the core is much more simpler than FC0 but the memory interface
> is quite similar and keeps most complex features.
> 
> read you soon,

I took a look now over it. Is it only done in javascript or is there also some VHDL?


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