Re: gEDA: icarus and force

[John Sheahan <jrsheahan@optushome.com.au>]

On Mon, Feb 16, 2004 at 10:26:41AM -0800, Stephen Williams wrote:
> 
> Normally, the input/output directions of ports and drivers is
> so checked at compile time that it is completely irrelevent that
> afterwords it is just connected as a net. But the side effect of
> this when force is involved is that the forced value is visible
> on the wrong side of the input or output port.
> 
> Assuming the compiler did it's job, this should be harmless,
> albeit confusing when looking at nets via vpi or gtkwave. The

I'm not sure I agree here that its just the viewer that gets upset.

I am playing with fault grading - inserting stuck-at faults into a gate
level netlist and seeing if a given set of vectors produced observable 
differences. This is compute intensive on randomly selected faults.

I tried using a force statement to insert the fault. Sometimes it was
ignored, sometimes it had excessive effects.

From what I understand a classic 'stuck-at' fault on a a gate output should
drive the net. 
On an input - you assume that the fault disconnects the pin  / the rest of
the net is unaffected.  This was what was causing me difficulties.

I now script edit the gate netlist to do what is approprite with the 
chosen pin.

Performing accelerated parallel scan simulations by jamming a scan vector
broadside into a scan chain is common too. Related problems.

And I'm still unsure what the LRM actually means in this case. If a module
input is a wire, then a force shouls propagate backwards.

regards, John