gEDA-dev: Fixed verilog and vhdl netlist backends...

[Peter Clifton <pcjc2@xxxxxxxxx>]

Attache is the patch I propose to push.. (it fixes the test-suite I
cobbled together looking at changes in various outputs since 1.3.0).

If someone with some scheme-fu could verify these, I'll be happier. This
is output from diff -b (ignore whitespace changes). A large block was
re-indented, so this is clearest to see the changes.

The real delta is seen:

http://repo.or.cz/w/geda-gaf/pcjc2.git?a=commitdiff;h=61bac435162799dcb7b697260876c57746c2a0f8


The aim is that processing (which calls into gnetlist and interrogates
the schematic) only happens when gnetlist calls the (<backend>) method,
_not_ as the netlist backend loads. This is because the backend now
loads _before_ schematic traversal.


Patch:

diff --git a/gnetlist/scheme/gnet-verilog.scm b/gnetlist/scheme/gnet-verilog.scm
index ad31a8b..2675d3d 100644
--- a/gnetlist/scheme/gnet-verilog.scm
+++ b/gnetlist/scheme/gnet-verilog.scm
@@ -343,9 +343,14 @@
 ;;  return a list of net description objects
 ;;
 
-(define the-nets '())
 
-(define verilog:get-nets 
+(define verilog:get-nets '())
+
+
+(define verilog:get-nets-once!
+  (lambda nil
+    (define the-nets '())
+    (set! verilog:get-nets
   (begin 
     (for-each 
      (lambda (netname)
@@ -438,7 +443,10 @@
      )
      
     all-unique-nets)
-    the-nets))
+      the-nets)
+    )
+    verilog:get-nets
+))
 
 ;; Retrieve the requested net record from the database.
 
@@ -624,6 +632,7 @@
   (lambda (output-filename)
     (let ((port (open-output-file output-filename)))
       (begin
+       (verilog:get-nets-once!)
        (verilog:write-top-header port)
        (verilog:write-wires port)
        (verilog:write-continuous-assigns port)
diff --git a/gnetlist/scheme/gnet-vhdl.scm b/gnetlist/scheme/gnet-vhdl.scm
index 0b4bcf1..dea8b66 100644
--- a/gnetlist/scheme/gnet-vhdl.scm
+++ b/gnetlist/scheme/gnet-vhdl.scm
@@ -418,8 +418,9 @@
 ;;;
 
 (define unique-devices
+  (lambda nil
   (vhdl:get-unique-devices (map get-device packages))
-)
+))
 
 
 ;;; Signal Declaration
@@ -516,7 +517,7 @@
       ; Due to my taste will the component declarations go first
       ; XXX - Broken until someday
       ; THHE fixed today ;-)
-      (vhdl:write-component-declarations unique-devices p)
+      (vhdl:write-component-declarations (unique-devices) p)
       ; Then comes the signal declatations
       (vhdl:write-signal-declarations p)
     )


-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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