Re: gEDA: Verilog attributes question

[Steve Wilson <stevew@intrinsix.com>]

Stephen Williams wrote:
> stevew@intrinsix.com said:
> 
>>Anyway - I vote for handling the comments in some manner (which
>>OBVIOUSLY) I don't have to implement - ain't I brave with Mr.
>>Williams'  time ;-)
> 
> 
> So *none* of the commercial synthesizers support the use of
> attributes to control the synthesizer? Synopsys doesn't even
> support them as an alternate method?
> 
> 

Is there anyone in the market BESIDES Synopsys? ;-)

There actually are other synthesizers (buildgates comes to mind - I'd 
change that name if I were them, to close to the evil empire's leader)
but the other players are such a small subset compared to Synopsys it 
isn't even funny.

Now - I am NOT an expert on FPGA synthesizers - and likely tools like 
Synplicity use different pragmas - but I'll bet they all rely on the //
method NOT attributes. The simple fact is that attributes are the new 
kid on the block, and this is a problem that was "solved" with the 
synopsys hack a decade ago.

Steve Wilson