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Re: gEDA: verilog metacomments




steve@icarus.com said:
> I have run into cases where a program to be simulated by xst and FPGA
> Express

I of course means "synthesized", not simulated.
-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
steve at picturel.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."

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