gEDA: ACS (Al's Circuit Simulator) 0.23 uploaded

[Al Davis <aldavis@ieee.org>]

I have uploaded a new version of ACS (Al's Circuit Simulator)
to ftp://ftp.geda.seul.org/pub/geda/contrib/acs-0.23.tar.gz

Here are the release notes......


ACS 0.23 release notes  (06/15/99)

New features:

1. Level 6 mos model.

2. HSpice style PWL and POLY(1).

3. "Table" behavioral modeling function.

4. Mixed-mode digital initialization.



The bug fixes:

1. The alarm range worked backwards, now fixed.

2. Keep track of commons better.

3. Improved mixed-mode simulation.  It still has not been tested as
well as I would like, but is better.  Digital initialization works
now.

4. Another case of "zero time step" has been fixed.  This one was
relatively benign, in that it only caused a single extra full
evaluation, with immediate recovery to a normal step size.

5. "Z" probe gave wrong results when probing a voltage source.



Other improvements: (?)

1. Some subtractions now de-noise the result, eliminating the tiny
numbers that result from subtracting two nearly equal numbers.  The
threshold can be set by the option "roundofftol".  It is best left set
at 1e-13.  This improves speed slightly because 0 will prevent a
matrix reload, but any non-zero number will not.  It improves
convergence slightly because the tiny numbers (which result from
numerical problems) tend to cause further numerical problems.  These
tiny numbers are an artifact of the machine math, and vary depending
on optimization and machine implementation details.

2. MOS temperature effects are computed at run time, instead of at
load time, so you can change the temperature after loading and get
correct results.

3. The options for integration method have changed, and are more
flexible.  The default is still trapezoidal, but that may change in a
future release.  You can specify the mode individually for capacitors
and inductors.  The information is in the data structure for all
components, but it isn't always parsed.  A future release will let you
specify it by component or by model.  The names are Spectre
compatible, not Spice compatible, because it is more flexible.  The
Spice names are accepted, but may not act the same as they do in
Spice.  Choices are: unknown, euler, euleronly, trap, traponly.
Options accepted and coerced into something else are: gear2,
gear2only, trapgear, trapeuler.  In general, gear is treated as euler,
and each element will use either euler or trap.  The device choice
wins over the option command choice, but "only" wins over non-only.

4. Logic device syntax is changed.  There are two more nodes, so
power, ground, and enable are passed in.  Power and enable are not
used (except possibly in subckt models) but are required for
consistency.

5. In many (not all) cases, arbitrary limits, due to fixed size
arrays, have been removed.

6. More rigorous testing.  I actually have a regression suite now.  It
is still not rigorous enough.

7. More rigorous convergence criteria.  This should solve some of the
false convergence problems.  ACS convergence criteria has always been
more rigorous than Spice.



The cosmetic changes:

1. Convert most containers to STL.

2. Complete migration to the "common" tree, and eliminating reference
to the old C "x" structure extensions.
3. Rearrangement of MOS model hierarchy, to make it easier to install
other models.  (BSIM family is coming.)



Hot items for a future release (no promises, but highly probable):

1. More models, particularly the BSIM group (1,2,3) and table based.

2. Change to voltage based (instead of charge based) time step
control.

3. Homotopy methods to improve convergence.




To reach me, try this email address:
        aldavis@ieee.org

ACS ftp sites:
        ftp://sunsite.unc.edu/pub/Linux/apps/circuits/acs-0.23.tar.gz
        ftp://ftp.geda.seul.org/pub/geda/dist/acs-0.23.tar.gz
        http://www.geda.seul.org/dist/acs-0.23.tar.gz