Mail Thread Index

• Date Index

• gEDA: Information about netlist format, Sriram Ragunathan
  • Re: gEDA: Information about netlist format, Ales Hvezda
• Re: gEDA: Re: Verilog question wrt expression bit widths, James Lee
• Re: gEDA: char_width.c in gEDA-19990516, Ales Hvezda
• gEDA: New release scheme in place, Ales Hvezda
  • Re: gEDA: New release scheme in place, Hamish Moffatt
  • Re: gEDA: New release scheme in place, Hamish Moffatt
    • Re: gEDA: New release scheme in place, Ales Hvezda
      • Re: gEDA: New release scheme in place, Hamish Moffatt
      • Re: gEDA: New release scheme in place, Ales Hvezda
• gEDA: Misc announcements, Ales Hvezda
• gEDA: More info on that last development snapshot, Ales Hvezda
  • Re: gEDA: More info on that last development snapshot, Hamish Moffatt
    • Re: gEDA: More info on that last development snapshot, Ales Hvezda
  • Re: gEDA: More info on that last development snapshot, Stefan Petersen
    • Re: gEDA: More info on that last development snapshot, Ales Hvezda
      • Re: gEDA: More info on that last development snapshot, Stefan Petersen
      • Re: gEDA: More info on that last development snapshot, Steve Wilson
      • Re: gEDA: More info on that last development snapshot, Roger Williams
• Re: gEDA: gnetlist and hierarchy, Ales Hvezda
  • Re: gEDA: gnetlist and hierarchy, Gordon McGregor
• gEDA: Uploaded geda-symbols 19990601-1 (source all) to geda, Hamish Moffatt
• gEDA: Uploaded libgeda 19990601-1 (source i386) to geda, Hamish Moffatt
• gEDA: Uploaded geda 19990601 (source all) to geda, Hamish Moffatt
• gEDA: Uploaded geda-gschem 19990601-1 (source i386) to geda, Hamish Moffatt
• gEDA: new Debian packages, Hamish Moffatt
• gEDA: gEDA manual, Andre Malafaya Baptista
  • gEDA: gEDA manual, thi
  • Re: gEDA: gEDA manual, Ales Hvezda
• Re: gEDA: Re: Results from verilog XL, David Cary
  • Re: gEDA: Re: Results from verilog XL, Stephen Williams
  <Possible follow-up(s)>
  
  • RE: gEDA: Re: Results from verilog XL, stevenwilson
    • RE: gEDA: Re: Results from verilog XL, David Cary
      • RE: gEDA: Re: Results from verilog XL, thi
      • RE: gEDA: Re: Results from verilog XL, stevew
      • Re: gEDA: Re: Results from verilog XL, Jeff McNeal
      • gEDA: A GPL Verilog "lint" advocate, Brad Martin P.E.
      • Re: gEDA: Re: Results from verilog XL, Stephen Williams
• gEDA: latest gwave segfaults, Hamish Moffatt
  • Re: gEDA: latest gwave segfaults, Stephen Tell
    • Re: gEDA: latest gwave segfaults, Hamish Moffatt
      • Re: gEDA: latest gwave segfaults, Ales Hvezda
      • Re: gEDA: latest gwave segfaults, Stephen Tell
      • Re: gEDA: latest gwave segfaults, Hamish Moffatt
• gEDA: Verilog integers, Stephen Williams
  • Re: gEDA: Verilog integers, Michael Baxter
    • Re: gEDA: Verilog integers, Stephen Williams
• gEDA: Verilog 19990606 snapshot, Stephen Williams
  • Re: gEDA: Verilog 19990606 snapshot, Stephen Tell
• gEDA: Verilog integer bits, Stephen Williams
  • Re: gEDA: Verilog integer bits, Michael Baxter
    • Re: gEDA: Verilog integer bits, Stephen Williams
      • Re: gEDA: Verilog integer bits, Michael Baxter
      • Re: gEDA: Verilog integer bits, Stephen Williams
  • Re: gEDA: Verilog integer bits, Michael Baxter
• gEDA: Re: Verilog integer bits, James Lee
  • gEDA: Re: Verilog integer bits, Stephen Williams
    • Re: gEDA: Re: Verilog integer bits, David Cary
      • Re: gEDA: Re: Verilog integer bits, Jeff McNeal
      • Re: gEDA: Re: Verilog integer bits, Stephen Williams
  <Possible follow-up(s)>
  
  • gEDA: Re: Verilog integer bits, James Lee
    • Re: gEDA: Re: Verilog integer bits, Stephen Williams
• gEDA: VCD viewers, Stephen Williams
  • Re: gEDA: VCD viewers, Stefan Thiede
    • Re: gEDA: VCD viewers, Stephen Williams
  • Re: gEDA: VCD viewers, Steve Wilson
    • Re: gEDA: VCD viewers, Stephen Williams
• gEDA: New symbols, José Daniel Muñoz Frías
  • Re: gEDA: New symbols, Ales Hvezda
    • Re: gEDA: New symbols, José Daniel Muñoz Frías
• gEDA: Alternative slot description format?, Roger Williams
  • gEDA: Alternative slot description format?, thi
    • Re: gEDA: Alternative slot description format?, Roger Williams
      • Re: gEDA: Alternative slot description format?, Rick Munden
      • Re: gEDA: Alternative slot description format?, Roger Williams
      • Re: gEDA: Alternative slot description format?, Ales Hvezda
      • Re: gEDA: Alternative slot description format?, Ales Hvezda
      • Re: gEDA: Alternative slot description format?, thi
      • Re: gEDA: Alternative slot description format?, Roger Williams
      • Re: gEDA: Alternative slot description format?, Ales Hvezda
• gEDA: Displaying component information?, Roger Williams
  • Re: gEDA: Displaying component information?, Gordon McGregor
• gEDA: 19990610 snapshot released, Ales Hvezda
• gEDA: Icarus Verilog 19990612 snapshot, Stephen Williams
• Re: gEDA: Power nets (first RFC), Roger Williams
  • Re: gEDA: Power nets (first RFC), Jeff McNeal
    • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Ansel Sermersheim
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Andrew M. Dyer
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Andrew M. Dyer
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Andrew Dyer
      • Re: gEDA: Power nets (first RFC), Stephen Williams
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Jeff McNeal
      • gEDA: Character Set for Names and Labels, Thomas Dean
      • Re: gEDA: Character Set for Names and Labels, Roger Williams
      • Re: gEDA: Character Set for Names and Labels, Ales Hvezda
      • Re: gEDA: Character Set for Names and Labels, Roger Williams
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), David Cary
      • Re: gEDA: Power nets (first RFC), Jeff McNeal
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Roger Williams
  <Possible follow-up(s)>
  
  • RE: gEDA: Power nets (first RFC), Mozur Matt
  • RE: gEDA: Power nets (first RFC), Mozur Matt
    • Re: gEDA: Power nets (first RFC), Roger Williams
  • RE: gEDA: Power nets (first RFC), Mozur Matt
    • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
  • Re: gEDA: Power nets (first RFC), Roger Williams
  • RE: gEDA: Power nets (first RFC), stevenwilson
    • RE: gEDA: Power nets (first RFC), thi
    • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Ales Hvezda
      • Re: gEDA: Power nets (first RFC), Laurin Blacken
      • Re: gEDA: Power nets (first RFC), Jeff McNeal
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
      • Re: gEDA: Power nets (first RFC), Thomas Dean
      • Re: gEDA: Power nets (first RFC), Roger Williams
  • RE: gEDA: Power nets (first RFC), stevenwilson
  • RE: gEDA: Power nets (first RFC), Mozur Matt
• Again ... gEDA: Icarus Verilog 19990612 snapshot, Stephen Williams
  • gEDA: unsubscribe how?Lost majordomo, jos runarko
    • Re: gEDA: unsubscribe how?Lost majordomo, Stefan Petersen
• Re: gEDA: Symbols Power Pins and Signal Directions, David Cary
• gEDA: VHDL mailing list?, David Cary
  • Re: gEDA: VHDL mailing list?, Dale E. Martin
• gEDA: Clipboard, Roger Williams
• gEDA: geda-dev@seul.org, Peter Cooper
• RE: gEDA: A GPL Verilog "lint" advocate, stevenwilson
• gEDA: Warnings from ivl, Jeff McNeal
  • Re: gEDA: Warnings from ivl, Stephen Williams
  <Possible follow-up(s)>
  
  • RE: gEDA: Warnings from ivl, stevenwilson
  • RE: gEDA: Warnings from ivl, stevenwilson
  • RE: gEDA: Warnings from ivl, stevenwilson
    • Re: gEDA: Warnings from ivl, Stephen Williams
      • Re: gEDA: Warnings from ivl, stevew
      • Re: gEDA: Warnings from ivl, Stephen Williams
    • Re: gEDA: Warnings from ivl, Jeff McNeal
  • RE: gEDA: Warnings from ivl, stevenwilson
    • gEDA: ivl to XNF, Stephen Williams
• gEDA: open hardware database, Graham Seaman
  • Re: gEDA: open hardware database, Ales Hvezda
    • Re: gEDA: open hardware database, Graham Seaman
      • Re: gEDA: open hardware database, Ales Hvezda
  • Re: gEDA: open hardware database, Stefan Petersen
• gEDA: Savant version 1.01 available, Dale E. Martin
• [Fwd: gEDA: New symbols], José Daniel Muñoz Frías
  • Re: [Fwd: gEDA: New symbols], Ales Hvezda
• gEDA: gmos version, Ed Carter (r47652)
  • Re: gEDA: gmos version, Ales Hvezda
• gEDA: Icarus Verilog 19990619 snapshot, Stephen Williams
  • Re: gEDA: Icarus Verilog 19990619 snapshot, Michael Baxter
    • ivl and XNF: (Re: gEDA: Icarus Verilog 19990619 snapshot), Stephen Williams
  • Re: gEDA: Icarus Verilog 19990619 snapshot, Stefan Thiede
    • Re: gEDA: Icarus Verilog 19990619 snapshot, Stephen Williams
    • gEDA: comment patch, Stephen Williams
      • gEDA: vpp preprocessor for ivl - `define not working?, Stephen Tell
      • gEDA: Re: vpp preprocessor for ivl - `define not working?, Stephen Williams
      • Re: gEDA: Re: vpp preprocessor for ivl - `define not working?, Steve Wilson
      • Re: gEDA: Re: vpp preprocessor for ivl - `define not working?, Stephen Williams
  • Re: gEDA: Icarus Verilog 19990619 snapshot, Ales Hvezda
  <Possible follow-up(s)>
  
  • RE: gEDA: Icarus Verilog 19990619 snapshot, stevenwilson
    • Re: gEDA: Icarus Verilog 19990619 snapshot, Stefan Thiede
• gEDA: ivl XNF w/ patch, Stephen Williams
• gEDA: ACS (Al's Circuit Simulator) 0.23 uploaded, Al Davis
  • Re: gEDA: ACS (Al's Circuit Simulator) 0.23 uploaded, Manu Rouat
    • Re: gEDA: ACS (Al's Circuit Simulator) 0.23 uploaded, Hamish Moffatt
  • Re: gEDA: ACS (Al's Circuit Simulator) 0.23 uploaded, Ales Hvezda
• gEDA: CERTIFIED GIFTED PSYCHICS, jimsmith
  <Possible follow-up(s)>
  
  • gEDA: CERTIFIED GIFTED PSYCHICS, jimsmith
• gEDA: Verilog Netlister 19990629 Released, Mike Jarabek
• gEDA: OrCAD imports to gEDA, Matt Ettus
  • Re: gEDA: OrCAD imports to gEDA, Stephen Williams
  <Possible follow-up(s)>
  
  • Re: gEDA: OrCAD imports to gEDA, Matt Ettus