Re: gEDA: Verilog: misc. elaboration

[Stephen Williams <steve@icarus.com>]

stevenwilson@micron.com said:
> I'll ensure that these get covered in the test suite!

Some of these tests, including those from Peter and Guy, should be
included literally in a test suite. It doesn't really matter if they
cover a feature you already cover, they are different programs and
vicissitudes of ivl compilation and optimization can make a seemingly
trivial difference cause significantly different results.

*Especially if they somehow fail when they are presented to us.*

Perhaps a Regression section is needed?
-- 
Steve Williams                "The woods are lovely, dark and deep.
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