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Re: gEDA-user: Split ground planes and zero ohm jumpers
John Griessen:
...
> Do we have a way to make a zero Ohm "two terminal" footprint with some copper inside,
> or pad overlap, that connects the pads and fits with the pcb program?
> I can't remember for sure, but think not...
> Another way to say that is, can we have footprint
> numbered pads of different number that touch?
Like this?
# 3216 / 1206 as "connecting" footprint
Element ["" "" "??" "" 0 0 -0.7mm -0.8mm 0 100 ""]
(
Pad [ -1.550mm -0.350mm -1.550mm 0.350mm 1.3mm 0.5mm 1.500mm "1" "1" "square" ]
Pad [ 1.550mm -0.350mm 1.550mm 0.350mm 1.3mm 0.5mm 1.500mm "2" "2" "square" ]
# shorting trace
Pad [ -1.550mm 0.000mm 1.550mm 0.000mm 0.5mm 0.5mm 0.700mm "c" "c" "square" ]
ElementLine [ -2.460mm 1.260mm 2.460mm 1.260mm 0.32mm ]
ElementLine [ 2.460mm 1.260mm 2.460mm -1.260mm 0.32mm ]
ElementLine [ 2.460mm -1.260mm -2.460mm -1.260mm 0.32mm ]
ElementLine [ -2.460mm -1.260mm -2.460mm 1.260mm 0.32mm ]
)
Works perfectly fine (for the attaced pcb file) till you press "o":
Warning! Net "unnamed_net1" is shorted to net "unnamed_net3"
Warning! Net "unnamed_net1" is shorted to F1 pad c
Warning! Net "unnamed_net3" is shorted to net "unnamed_net1"
Warning! Net "unnamed_net3" is shorted to F1 pad c
Regards,
/Karl Hammar
-----------------------------------------------------------------------
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57
# release: pcb 1.99z
# date: Fri Apr 8 22:32:50 2011
# user: karl (Karl Hammar,Lilla Aspö 148 / 742 94 Östhammar,0173 140 57,0173 140 51)
# host: opal.lcl.aspodata.se
# To read pcb files, the pcb version (or the git source date) must be >= the file version
FileVersion[20100606]
PCB["" 157480 157480]
Grid[984.251953 0 0 0]
Cursor[0 0 0.000000]
PolyArea[200000000.000000]
Thermal[0.500000]
DRC[1023 1023 1023 1023 1496 1023]
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ElementLine [9685 -4961 9685 4961 1260]
)
Element["selected" "ctb93he_s.fp" "CONN1" "unknown" 43308 49212 0 -13780 0 100 "selected"]
(
Pin[0 0 11811 1968 12598 5512 "1" "1" "selected,square,edge2"]
Pin[15000 0 11811 1968 12598 5512 "2" "2" "selected,edge2"]
Pin[30000 0 11811 1968 12598 5512 "3" "3" "selected,edge2"]
ElementLine [-10236 -4724 -10236 25591 1260]
ElementLine [40157 -4724 -10236 -4724 1260]
ElementLine [40157 25591 40157 -4724 1260]
ElementLine [-10236 25591 40157 25591 1260]
)
Layer(1 "component")
(
Line[81693 17717 81693 40827 1000 2000 "clearline"]
Line[81693 40827 73308 49212 1000 2000 "clearline"]
Line[63386 17716 74212 17716 1000 2000 "clearline"]
Line[74212 17716 74213 17717 1000 2000 "clearline"]
Line[43308 37796 43308 49212 1000 2000 "clearline"]
Line[40354 17717 51182 17716 1000 2000 "clearline"]
Line[40354 32480 43308 37796 1000 2000 "clearline"]
)
Layer(2 "solder")
(
)
Layer(3 "outline")
(
)
Layer(4 "GND")
(
)
Layer(5 "power")
(
)
Layer(6 "signal1")
(
)
Layer(7 "signal2")
(
)
Layer(8 "signal3")
(
)
Layer(9 "silk")
(
)
Layer(10 "silk")
(
)
NetList()
(
Net("unnamed_net1" "(unknown)")
(
Connect("F1-2")
Connect("R1-2")
)
Net("unnamed_net2" "(unknown)")
(
Connect("D1-2")
Connect("R1-1")
)
Net("unnamed_net3" "(unknown)")
(
Connect("CONN1-1")
Connect("F1-1")
)
Net("unnamed_net4" "(unknown)")
(
Connect("CONN1-3")
Connect("D1-1")
)
)
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