Re: gEDA-user: Re: power connections and hierarchy

[John Griessen <john_g@xxxxxxxxxx>]

Kai-Martin Knaak wrote:

> This did not work for me. The netname attribute did not affect the net of
> the power pin, even if I included the pin number (netname=foo:1). I also
> tried to no avail to include the netname attribute into the symbol. 
>
> How about a "global" attribute, that make a net explicitely global? 

Oh, that netname mangle setting got me.  It made my statement false.

So, we have subschematic via symbol pins and the special use of refdes=desired 
netname and source=which schematic is related to the subschematic symbol.

But it's all one way or the other.  Either you get all connections to the 
subschematic through pins or through global nets, but not some of each.

I suppose some of each could be possible, but I'd rather put that off, then dig 
into defining hierarchy handling with netnames as in schematics of sub modules 
without having to rework them so much.  The way Cadence tools do -- a path 
through the hierarchy plus a netname in the leaf cell.  Then the leaf cell 
netname could be put on PCB objects as a one property and path through the 
hierarchy could be put on PCB objects as another property.  Then all kinds of 
options open up.  To do that, you autogenerate a symbol, and if the schematic 
contains a Vdd symbol, it generates a connection for Vdd.   When done that way, 
there are no two ways to do it and confusion ensuing.

Maybe we could start going in that direction even before using gnetman and 
datadraw to store proerties/attributes.  I'm always trying to create some time 
left to work on that...

John G


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