Re: gEDA-user: pcb, howto partition power planes?

[Larry Doolittle <ldoolitt@xxxxxxxxxxxxxxx>]

On Tue, Oct 28, 2008 at 02:49:37PM -0400, DJ Delorie wrote:
> 
> > In my 20+ years in engineering I have yet to see one case where
> > splitting a ground plane under high-speed ADCs has worked.
> 
> What about high precision ADCs?  I'm working on a design using ADE7753
> power monitor chips (16-bit ADCs) , and their own app note (AN564)
> shows a ferrite isolating analog ground, and a 10R resistor isolating
> AVdd.

In my 30+ years in engineering, I see much more trouble caused by
splitting ground planes than solved by them.

App notes and example designs are special cases: there is only
one chip straddling the analog and digital divide.  If you have
more than one (e.g., both an ADC and a DAC) all those ideas
pretty much go out the window, and you're better off with a
single ground plane.

I have seen exactly one case where a "split" (very carefully done)
on the ground plane was needed to avoid a source of ground return
crosstalk.

     - Larry


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