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Re: [f-cpu] RC5, F-CPU and srotl



Hi,

> Depends on your definitions of `really' and `simd' ;)
I think that you have understand what I mean.

> > version :
> > %macro simdrotl 3
> >         shiftri 32, %1, %3
> >         rotl.q  %2, %1, %1
> >         shiftri 32, %2, %2
> >         rotl.q  %2, %3, %3
> >         shiftri 32, %3, %3
> >         or      %3, %1, %1
> > %endmacro
> 
> I guess that should read `shiftli 32, %3, %3', right?
Oups again, yes you have right (but I will now use mix instruction)
 
> Here's a 16-bit version, using slightly less than 3 instructions per
> slice, and only 2 registers:
> 
> 	rotl.d  %2, %1, %1
> 	shiftri 16, %2, %2
> 	rotri   16, %1, %1
> 	rotl.d  %2, %1, %1
> 	shiftri 16, %2, %2
> 	rotri   16, %1, %1
> 	rotl.d  %2, %1, %1
> 	shiftri 16, %2, %2
> 	rotri   16, %1, %1
> 	rotl.d  %2, %1, %1
> 	rotr    16, %1, %1
Well, we lost what %2 and %1 contain after the call. I know in my call too,
but it can be a problem.

> > 	An other thing about the srotl, it currently double the asm code.
> > It mean that, if we have a real srotl operation, we will have the same or 
> > better performance than the K7 core (who is actually the best for this
> > algorithm). So my question is what is the cost of having a real srotl
> > instruction ?
> A more complex shifter unit, with more delay.
It was what I was thinking, but is it so important ?
 
> A while ago (precisely: Aug 15, 2001), I wrote this:
> 
> 	- The loadm/storem has a surprising operand order
> 	  (start,src/dest,count), and it's not clear whether the
> 	  register *numbers* or the register *contents* serve as the
> 	  start/count values.  I suggest the former, and I would also
> 	  change the operands to (firstreg, lastreg, memaddr) which is
> 	  much easier to grok for humans.
> 
> Two days later, Yann replied:
> 
> 	 - whether it is the contents or the value of the address does
> 	   not change much except that the value is know 2 cycles
> 	   before or after. i'd prefer to use the register number than
> 	   its value, though, if possible.  though using the register
> 	   contents might also help.
> 
> That is, the first and third operand can be considered immediate
> operands in disguise.
So, we need to patch the manual.

A+
  Cedric
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