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Re: [f-cpu] RC5, F-CPU and srotl

On Fri, Apr 12, 2002 at 07:07:37AM +0200, Yann Guidon wrote:
[...]
> > Crypto stuff may be "cool",
> if you know the CCC guys, you will understand what i mean ;-)

I know some of them. But I don't think what they do is "cool", sorry.

> they are the one who introduced to this field and if F-CPU holds its promises,
> they will continue to help us.

You mean, invite us to this year's CCC?

> > but something that fits into the L1 cache
> > doesn't qualify as a real application, IMHO :)
> i have read on comp.sys.super : "cache memory is for the people who
> can't afford lots of fast main memory" ;-)

Well, unfortunately... ;)

> >  Besides that, many crypto
> > algorithms can be done better (and faster) in dedicated hardware.
> yup but they often do only 1 algo.

FPGA?

> > What's a 64-bit CPU good for, compared to a 32-bit one? It's not
> > necessarily faster,
> it can be, as it treats wider data.

That's wrong in many cases. Wider data types don't buy you anything if
the range or precision of your numbers doesn't grow. But you need more
memory to store a variable (which will slow down the program), or you'll
have to work with partial registers (which may slow down the CPU). In some
cases, SIMD can make the CPU perform better (numeric kernels, multimedia
stuff), but a more general application with lots of (integer) add, shift,
compare and pointer operations won't run faster on a 64-bit machine.

> > but it can handle large working sets. Therefore
> > I'd rather focus on scientific applications, databases and so on.
> don't worry, this will follow naturally, but how many scientists do you
> know around F-CPU ?...

Do I have to *know* them? ;)

> > [...]
> > > The case of dnet is looking different but i can't involve myself
> > > in this now. The case of the SIMD shift has been proved and there
> > > does not seem to be any difficulty in implementing it with F-CPU,
> > > we simply disagree on a "small" implementation detail :-)
> > 
> > Huh? No difficulty?
> huh, i'll try to make my own shifter... whenever i can :-)

With all operations performed in one cycle? I already violated the
6G/10T rule in my design.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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